[AI generated draft] minimax_m3(amd): implement SupportsEagle3 for EAGLE3 spec decoding on ROCm#1
[AI generated draft] minimax_m3(amd): implement SupportsEagle3 for EAGLE3 spec decoding on ROCm#1functionstackx wants to merge 1 commit into
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Port the EAGLE3 aux-hidden-state plumbing from nvidia/model.py to the AMD MiniMax-M3 model so method=eagle3 (e.g. Inferact/MiniMax-M3-EAGLE3) works on ROCm. The AMD class lacked SupportsEagle3, so engine init failed: 'Model does not support EAGLE3 interface but aux_hidden_state_outputs was requested'. Changes (mirroring nvidia/model.py exactly): - import EagleModelMixin, SupportsEagle3 - MiniMaxM3Model(nn.Module, EagleModelMixin) + emit aux_hidden_states - MiniMaxM3SparseForCausalLM(..., SupportsEagle3) - MiniMaxM3SparseForConditionalGeneration(..., SupportsEagle3) Signed-off-by: functionstackx <47992694+functionstackx@users.noreply.github.com>
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…atch vllm-project/vllm#45546) (#1745) * minimaxm3-fp8-mi355x-vllm-mtp: day-zero MiniMax-M3 EAGLE3 MI355X recipe Adds the spec-decoding=mtp sibling of minimaxm3-fp8-mi355x-vllm: same MXFP8 target and ROCm serve shape (--block-size 128, FP8 KV cache, --attention-backend TRITON_ATTN, --enforce-eager, minimax_m3 parsers), plus the Inferact/MiniMax-M3-EAGLE3 draft head via --speculative-config (method eagle3, 3 speculative tokens). Unlike the CUDA recipes the drafter needs no attention_backend override — the FlashInfer page-128/MHA limitation that forced FLASH_ATTN on Blackwell is FlashInfer-specific; the whole server runs on TRITON_ATTN here, which serves the MHA draft fine. Benchmark prompts run through the chat template so acceptance reflects real text. Search space mirrors the non-MTP entry trimmed at the extreme-concurrency end (tp2-ep2 dropped), matching the b300/b200 MTP precedent. Launcher needs no change — launch_mi355x-amds.sh already resolves the _mtp script via SPEC_SUFFIX. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> * minimaxm3-fp8-mi355x-vllm-mtp: runtime-patch EAGLE3 to test on MI355X Test PR built on the EAGLE3 MI355X recipe (60d9910). The shipped vllm/vllm-openai-rocm:minimax-m3 image lacks SupportsEagle3 on the AMD MiniMax-M3 model, so method=eagle3 aborts engine init. Rather than wait for an image rebuild, the recipe applies the fix (functionstackx/vllm#1, ported from nvidia/model.py) in-place to the installed vllm before serving — adds EagleModelMixin + aux-hidden-state emission to the inner model and SupportsEagle3 to the two outer classes. The patch is idempotent and hard-fails if the installed amd/model.py drifted from the expected base (verified byte-identical to the image commit g4a560dd8d). Validates EAGLE3 + Inferact/MiniMax-M3-EAGLE3 on real MI355X hardware ahead of the upstream fix landing in the image. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> * perf-changelog: fill in PR link for minimaxm3-fp8-mi355x-vllm-mtp eagle3 test Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> * perf-changelog: reset PR link for mi355x eagle3 test (fresh PR) Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> * perf-changelog: fill in PR link for mi355x eagle3 test (#1745) Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> --------- Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
… (MTP) MI300X recipe (#1749) * minimaxm3-fp8-mi300x-vllm-mtp: day-zero MiniMax-M3 EAGLE3 MI300X recipe Adds the spec-decoding=mtp sibling of minimaxm3-fp8-mi300x-vllm, based on the MI300X non-MTP recipe + the MI355X MTP recipe. Keeps the MI300X serve shape (BF16 KV cache — gfx942 lacks calibrated ROCm FP8 attention scales — plus --no-enable-prefix-caching, TRITON_ATTN, --enforce-eager, minimax_m3 parsers) and adds the Inferact/MiniMax-M3-EAGLE3 draft via --speculative-config (method eagle3, 3 spec tokens) + chat-template prompts. Carries the same in-place EAGLE3 patch as the MI355X MTP recipe: the shipped ROCm image's AMD MiniMax-M3 model lacks SupportsEagle3, so the recipe patches the installed amd/model.py before serving (functionstackx/vllm#1, upstream vllm-project/vllm#45546; validated green on MI355X). Idempotent; hard-fails on base drift. TP8-only search space (gfx942 192 GB is memory-tight, like H100), TP8 latency rows started at conc 1, matching the H100/MI355X MTP recipes. Also adds SPEC_SUFFIX to launch_mi300x-amds.sh so spec-decoding=mtp routes to the _mtp script (the launcher hardcoded _mi300x.sh). Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> * perf-changelog: fill in PR link for minimaxm3-fp8-mi300x-vllm-mtp (#1749) Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> --------- Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
… (MTP) MI300X recipe (#1749) * minimaxm3-fp8-mi300x-vllm-mtp: day-zero MiniMax-M3 EAGLE3 MI300X recipe Adds the spec-decoding=mtp sibling of minimaxm3-fp8-mi300x-vllm, based on the MI300X non-MTP recipe + the MI355X MTP recipe. Keeps the MI300X serve shape (BF16 KV cache — gfx942 lacks calibrated ROCm FP8 attention scales — plus --no-enable-prefix-caching, TRITON_ATTN, --enforce-eager, minimax_m3 parsers) and adds the Inferact/MiniMax-M3-EAGLE3 draft via --speculative-config (method eagle3, 3 spec tokens) + chat-template prompts. Carries the same in-place EAGLE3 patch as the MI355X MTP recipe: the shipped ROCm image's AMD MiniMax-M3 model lacks SupportsEagle3, so the recipe patches the installed amd/model.py before serving (functionstackx/vllm#1, upstream vllm-project/vllm#45546; validated green on MI355X). Idempotent; hard-fails on base drift. TP8-only search space (gfx942 192 GB is memory-tight, like H100), TP8 latency rows started at conc 1, matching the H100/MI355X MTP recipes. Also adds SPEC_SUFFIX to launch_mi300x-amds.sh so spec-decoding=mtp routes to the _mtp script (the launcher hardcoded _mi300x.sh). Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> * perf-changelog: fill in PR link for minimaxm3-fp8-mi300x-vllm-mtp (#1749) Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> --------- Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
…3 (MTP) MI325X recipe (#1759) * minimaxm3-fp8-mi325x-vllm-mtp: day-zero MiniMax-M3 EAGLE3 MI325X recipe Adds the spec-decoding=mtp sibling of minimaxm3-fp8-mi325x-vllm (#1748), based on the MI325X non-MTP recipe + the MI300X MTP recipe. gfx942 serve shape (BF16 KV cache, --no-enable-prefix-caching, TRITON_ATTN, minimax_m3 parsers), runs with CUDA graphs (no --enforce-eager, VLLM_USE_BREAKABLE_CUDAGRAPH=0), plus the Inferact/MiniMax-M3-EAGLE3 draft via --speculative-config (eagle3, 3 tokens) + chat-template prompts. Carries the same in-place EAGLE3 patch as the mi300x/mi355x MTP recipes (functionstackx/vllm#1, upstream vllm-project/vllm#45546): the ROCm image lacks SupportsEagle3, so the recipe patches the installed amd/model.py before serving. H200-style search space trimmed at the high-conc end, latency rows at conc 1. Also adds SPEC_SUFFIX to launch_mi325x-amds.sh so spec-decoding=mtp routes to the _mtp script. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> * perf-changelog: fill in PR link for minimaxm3-fp8-mi325x-vllm-mtp Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> --------- Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
Problem
method: eagle3with an external draft (e.g.Inferact/MiniMax-M3-EAGLE3) fails engine init on ROCm / MI355X:(
vllm/v1/worker/gpu_model_runner.py→_setup_eagle3_aux_hidden_state_outputs)The MiniMax-M3 implementation is platform-split (
vllm/models/minimax_m3/__init__.pypicksamd/vsnvidia/bycurrent_platform.is_rocm()). The NVIDIA model implementsSupportsEagle3and emits auxiliary hidden states; the AMD model does not — sosupports_eagle3(model)isFalseon ROCm and EAGLE3 aborts. This is why EAGLE3 works on B200/B300/H100/H200 but not MI355X.Fix
Port the EAGLE3 plumbing from
nvidia/model.pytoamd/model.py(the two files are otherwise parallel; the EAGLE3 bits are the only difference). The required interface methods come entirely fromEagleModelMixin+ theSupportsEagle3base — no per-model method bodies are needed:EagleModelMixin,SupportsEagle3class MiniMaxM3Model(nn.Module, EagleModelMixin)and emitaux_hidden_statesinforward()class MiniMaxM3SparseForCausalLM(nn.Module, SupportsEagle3)class MiniMaxM3SparseForConditionalGeneration(nn.Module, SupportsMultiModal, SupportsEagle3)SupportsEagle3.set_aux_hidden_state_layersresolves throughself.language_model.modeland asserts it's anEagleModelMixin— both already present on the AMD classes, so the inheritance is sufficient.Validation status
ast.parseclean; diff is one file (+15/−5), mirroringnvidia/model.pyline-for-line.vllm/vllm-openai-rocm:minimax-m3from this branch and run a MiniMax-M3-MXFP8 MI355X sweep with--speculative-config '{"method":"eagle3","model":"Inferact/MiniMax-M3-EAGLE3","num_speculative_tokens":3}'.🤖 Generated with Claude Code